In order to avoid the influence from process variation, the layout of the circuit schematics should follow the design Rule 。 Potential Problem – Short between Source and Drainĭegree of anisotropy A = 1 – r lat /r vert Where r  respective etch rates Physical Limitationsĭesign Rule (0) Due to the photo resolution, concentration, temperature and reaction time of the chemical reagents, the layout should tolerate some errors caused by process environment. Minimum metal to metal spacing = 3  Lambda-based Design Rules 6  2  6   3  3 

All device mask dimensions are based on multiples of , e.g., polysilicon minimum width = 2 . As technology changes with smaller dimensions, a simple change in the value of  can be used to produce a new mask set. Lambda based design: half of technology since 1985. λ = 1um  w = 2 λ =2um s = 3 λ =3um Lambda-based Design Rules All widths, spacing and distances are written in the form  Value = m λ Where m is scaling multiplier. Lambda design rules are based on a reference metric λ that has units of um. To draw the stick diagram and the schematic for the following layoutĬMOS Stick Diagrams : 教育部顧問室「超大型積體電路與系統設計」教育改進計畫 EDA 聯盟 – 推廣課程 Chap.1 NORĬMOS Inverter Mask Layout Min. To draw the following circuitry by using a stick diagram CMOS Inverter Stick Diagrams V DD in VSS outĬMOS Transmission Gate The transmission gate Circuit schematic Stick diagram ĬMOS Inverter Stick Diagrams Basic layout More area efficient layout : 教育部顧問室「超大型積體電路與系統設計」教育改進計畫 EDA 聯盟 – 推廣課程 Chap.1ĬMOS inverter described in other way. Stick diagram doesn’t include information about the accurate coordinates and sizes of device, the length and width of conductors and the real size of well region. Stick diagram uses different lines, colors and geometrical shapes to present circuit nodes, devices, and their relative location. Stick diagram is a draft of real layout, it serves as an abstract view between the schematic and layout. In order to describe N/PMOS more completely, to add n-well 、 P+ select 、 well contact and substrate contact are optional for 4-terminal notation. Boston geometrical rule: The stick diagram also allows curves to describe circuitry. Manhattan geometrical rule: When we use only vertical and horizontal lines In orthogonal to describe circuitry. When a metal line needs to be connected to one of the other three conductors, a contact cut ( via ) is required. Gate is automatically self-aligned during fabrication. Diffusion must be drawn connecting the source and the drain. Polysilicon is drawn on top of diffusion. When polysilicon crosses N or P diffusion, an N or P transistor is formed. When the same material (on the same layer) touch or cross, they are connected and belong to the same electrical node. It is possible to translate stick diagram automatically to layout with correct design rules. Gives topological information (identifies different layers and their relationship) Assumes that wires have no width.

Stick Diagram Intermediate representation between the transistor level and the mask (layout) level. The stick diagram is similar to a backbone of the real layout but without the real size and aspect ratio of the devices, it still can reflect the real condition to layout of the silicon chip. Although the stick diagram is an abstract presentation of real layout, it can use graphical symbols or legend to allocate the circuit to 2-diomensional plane and reach the aim same as the physical layout does. Legend: contact metal 2 metal 1 poly ndiff pdiff VDD in VSS out ■Ī.

Based on the view point of IC layout, the stick diagram can help us understand the circuit function and its geometrical location relative to other circuit blocks. VLSI Design and Layout Practice Lect5 – Stick Diagram & Scalable Design Rules Danny Wen-Yaw Chung Institute of Electronic Engineering Chung-Yuan Christian University Sept.

Layouteditor stick diagram